AXI-Lite UVM Driver
Translate sequence items into protocol-correct AXI-Lite pin activity.
Task
Implement a UVM driver that gets an item from the sequencer, dispatches reads or writes, waits for ready/valid handshakes, then calls `item_done`.
Examples
- Write: drive AW and W then accept B response.
- Read: drive AR then accept R response.
Constraints
- Use a virtual `axi_lite_if`.
- Use `get_next_item`/`item_done`.
- Wait for channel handshakes instead of fixed-cycle assumptions.
What this problem is testing
UVM interview problems test transaction flow, ownership, phasing, TLM connections, checking strategy, and whether components remain reusable and debuggable.
Interview habit: before coding, state reset behavior, the state that must be stored, and the conditions that update each output.
Verification plan
- Trace one item from sequence creation through driver activity, monitor observation, and scoreboard checking.
- Inject a mismatch or protocol error to confirm the environment can fail for the correct reason.
- Check that handshakes and analysis connections cannot silently drop transactions.
- Run multiple transactions to exercise queues, ordering, and end-of-test behavior.
Common mistakes
- Putting checking logic in the driver.
- Dropping or duplicating items around sequencer-driver or analysis-port handshakes.
- Ending the test before outstanding transactions are checked.
- Reporting mismatches without enough diagnostic context.
Interview follow-up questions
- Which component should own the reference-model comparison?
- How would you debug a transaction that was driven but never reached the scoreboard?
Concepts to review
UVM, driver, ready-valid
Open AXI-Lite UVM Driver in the HDLForge interactive editor.
Related problems
- Build a UVM Driver — Medium
- Reference Model Scoreboard — Hard
- Ready/Valid Skid Buffer — Hard
- Backpressure-Safe Ready/Valid Source — Medium
- Valid-Ready Streaming Accumulator — Hard
Explore the UVM Practice & Interview Preparation hub.