UVM · Hard · SystemVerilog

AXI-Lite Reference Scoreboard

Check reads against a compact reference register model updated by observed writes.

Task

Implement a scoreboard analysis `write()` method. Apply write strobes to reference memory and compare read data against the stored expected word.

Examples

Constraints

What this problem is testing

UVM interview problems test transaction flow, ownership, phasing, TLM connections, checking strategy, and whether components remain reusable and debuggable.

Interview habit: before coding, state reset behavior, the state that must be stored, and the conditions that update each output.

Verification plan

Common mistakes

Interview follow-up questions

Concepts to review

UVM, scoreboard, reference model

Open AXI-Lite Reference Scoreboard in the HDLForge interactive editor.

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