AXI-Lite Functional Coverage
Measure whether verification exercised operation types, address regions, byte strobes and responses.
Task
Create a covergroup that samples transaction direction, address region, write strobes and response, including at least one useful cross.
Examples
- Cover reads and writes.
- Cross writes with byte-strobe patterns.
Constraints
- Use a covergroup with `coverpoint`.
- Include bins for common WSTRB patterns.
- Add a cross coverage item.
What this problem is testing
UVM interview problems test transaction flow, ownership, phasing, TLM connections, checking strategy, and whether components remain reusable and debuggable.
Interview habit: before coding, state reset behavior, the state that must be stored, and the conditions that update each output.
Verification plan
- Trace one item from sequence creation through driver activity, monitor observation, and scoreboard checking.
- Inject a mismatch or protocol error to confirm the environment can fail for the correct reason.
- Check that handshakes and analysis connections cannot silently drop transactions.
- Run multiple transactions to exercise queues, ordering, and end-of-test behavior.
Common mistakes
- Putting checking logic in the driver.
- Dropping or duplicating items around sequencer-driver or analysis-port handshakes.
- Ending the test before outstanding transactions are checked.
- Reporting mismatches without enough diagnostic context.
Interview follow-up questions
- Which component should own the reference-model comparison?
- How would you debug a transaction that was driven but never reached the scoreboard?
Concepts to review
coverage, AXI4-Lite, cross coverage
Open AXI-Lite Functional Coverage in the HDLForge interactive editor.
Related problems
- Build a UVM Driver — Medium
- Reference Model Scoreboard — Hard
- Basic Coverpoint Bins — Easy
- Cross Operation and Size — Medium
- Illegal Coverage Bin — Medium
Explore the UVM Practice & Interview Preparation hub.