RTL Design · Hard · SystemVerilog

EX Forwarding Unit

Resolve common RAW dependencies without stalling when the producer value is already available.

Task

Generate two 2-bit forwarding selects. Prefer the newest EX/MEM producer, otherwise use MEM/WB, while never forwarding x0.

Examples

Constraints

What this problem is testing

A strong answer translates the requirement into synthesizable state and combinational logic, states reset and update semantics precisely, and handles boundary conditions rather than only the nominal case.

Interview habit: before coding, state reset behavior, the state that must be stored, and the conditions that update each output.

Verification plan

Common mistakes

Interview follow-up questions

Concepts to review

RISC-V, hazards, forwarding

Open EX Forwarding Unit in the HDLForge interactive editor.

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