2x2 Input Tile Registers
Capture two 2x2 input matrices so computation is isolated from the input interface.
Task
On `load`, register A00..A11 and B00..B11. Hold the tile unchanged while compute is active.
Examples
- load=1 captures all eight matrix elements.
- load=0 preserves the current tile.
Constraints
- Synchronous reset.
- Capture only on load.
- Use signed 16-bit elements.
Accelerator verification checklist
- Exercise zero, maximum positive and negative operands where signed data is used.
- Check exact bit growth and make overflow or saturation behavior intentional.
- Verify reset, enable, valid and pipeline alignment cycle by cycle.
- Send back-to-back data to confirm the advertised throughput.
Concepts to review
matrix multiply, buffering, registers
Open 2x2 Input Tile Registers in the HDLForge interactive editor.
Related problems
- Signed INT8 Multiply-Accumulate — Easy
- Four-Lane INT8 Dot Product — Medium
- Eight-Lane Reduction Adder — Medium
- ReLU with 8-bit Saturation — Medium
- Systolic Array Processing Element — Hard