Systolic Array Processing Element
Build a single processing element for a small systolic matrix-multiply array.
Task
When enable is high, forward a_in to a_out and b_in to b_out while accumulating a_in*b_in into acc. clear resets acc synchronously but still allows forwarded outputs to update only when enable is high.
Examples
- a=2,b=3 -> acc increases by 6
- enable=0 -> a_out, b_out and acc hold
Constraints
- a and b data are signed 8-bit values.
- acc is signed 32-bit.
- clear has priority over accumulation.
- All state updates occur on the rising clock edge.
Accelerator verification checklist
- Exercise zero, maximum positive and negative operands where signed data is used.
- Check exact bit growth and make overflow or saturation behavior intentional.
- Verify reset, enable, valid and pipeline alignment cycle by cycle.
- Send back-to-back data to confirm the advertised throughput.
Concepts to review
accelerator, systolic-array, mac, pipeline
Open Systolic Array Processing Element in the HDLForge interactive editor.
Related problems
- Signed INT8 Multiply-Accumulate — Easy
- Four-Lane INT8 Dot Product — Medium
- Eight-Lane Reduction Adder — Medium
- ReLU with 8-bit Saturation — Medium
- Valid-Tagged Pipelined Multiplier — Hard