Accelerators · Easy · Verilog, SystemVerilog, VHDL

Signed INT8 Multiply-Accumulate

Build the basic signed INT8 multiply-accumulate datapath used in DSP and machine-learning accelerators.

Task

On each rising clock edge with enable high, accumulate a*b into a 32-bit signed accumulator. clear has priority over enable.

Examples

Constraints

Accelerator verification checklist

Concepts to review

accelerator, mac, int8, datapath

Open Signed INT8 Multiply-Accumulate in the HDLForge interactive editor.

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