RTL Design · Hard · Verilog, SystemVerilog, VHDL

First-Word Fall-Through Buffer

Implement a two-entry first-word fall-through queue.

Task

When non-empty, dout must reflect the oldest stored word without waiting for rd_en.

Examples

Constraints

What this problem is testing

A strong answer translates the requirement into synthesizable state and combinational logic, states reset and update semantics precisely, and handles boundary conditions rather than only the nominal case.

Interview habit: before coding, state reset behavior, the state that must be stored, and the conditions that update each output.

Verification plan

Edge cases worth testing

Common mistakes

Interview follow-up questions

Concepts to review

fifo, fwft, buffer

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