Accelerators · Medium · SystemVerilog

Signed Fixed-Point MAC

Build the arithmetic primitive used by the FIR datapath.

Task

Multiply two signed 16-bit inputs and accumulate into a signed 40-bit register when `enable` is asserted.

Examples

Constraints

Accelerator verification checklist

Concepts to review

DSP, MAC, fixed point

Open Signed Fixed-Point MAC in the HDLForge interactive editor.

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