Accelerators · Hard · Verilog, SystemVerilog, VHDL

2x2 Matrix Multiply Datapath

Implement a small combinational 2x2 signed matrix-multiply datapath.

Task

Given signed 8-bit matrices A and B, compute C=A*B with four signed 18-bit outputs.

Examples

• identity A -> C equals B
• all-ones matrices -> every output equals 2

Constraints

• All inputs are signed 8-bit.
• Outputs are signed 18-bit.
• Combinational RTL only.

Accelerator verification checklist

• Exercise zero, maximum positive and negative operands where signed data is used.
• Check exact bit growth and make overflow or saturation behavior intentional.
• Verify reset, enable, valid and pipeline alignment cycle by cycle.
• Send back-to-back data to confirm the advertised throughput.

Concepts to review

accelerator, matrix-multiply, mac, parallelism

Open 2x2 Matrix Multiply Datapath in the HDLForge interactive editor.

Related problems

• Signed INT8 Multiply-Accumulate — Easy
• Four-Lane INT8 Dot Product — Medium
• Eight-Lane Reduction Adder — Medium
• ReLU with 8-bit Saturation — Medium
• Systolic Array Processing Element — Hard