Design Verification · Beginner

APB Peripheral Verification Suite

Verify GPIO, timer and register-bank peripherals behind APB with reusable agents and negative/error tests.

Why build it: A compact way to show verification fundamentals before moving to AXI or processor-level work.

Key skills

SystemVerilogAPBAssertionsScoreboards

Implementation plan

Verification plan

Suggested deliverables

Problems to practise first

Build a UVM Driver
UVM · Medium
UVM Monitor Analysis Port
UVM · Medium
Valid Must Eventually Handshake
SVA · Medium

What to discuss in an interview

Browse projects in HDLForge