Bounded Arbiter Liveness
Prove a bounded progress guarantee for a requester that stays asserted.
Task
If req[0] remains asserted, require grant[0] within four cycles.
Examples
- Implement the required behavior and preserve it under the stated control conditions.
Constraints
- Use synthesizable SystemVerilog unless this stage is verification-only.
Concepts to review
formal, liveness, arbiter
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Related problems
- 4-Request Priority Arbiter — Medium
- One-Hot Grant Assertion — Easy
- Bounded Request Response — Medium
- Formal Reset Assumptions — Medium
- FIFO Safety Properties — Hard