FIFO Safety Properties
Prove that FIFO occupancy never leaves its legal range.
Task
For a FIFO with DEPTH=8 and a 4-bit count, assert count <= DEPTH and assert that full exactly matches count==DEPTH.
Examples
- Implement the required behavior and preserve it under the stated control conditions.
Constraints
- Use synthesizable SystemVerilog unless this stage is verification-only.
Concepts to review
formal, FIFO, SVA
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Related problems
- Async FIFO Dual-Port Memory — Easy
- Async FIFO Binary Pointers — Medium
- Binary-to-Gray Pointer Conversion — Easy
- Async FIFO Empty Detection — Easy
- Async FIFO Full Detection — Hard