HDLForge · Computer architecture interview preparation

Computer Architecture Interview Questions

Architecture interviews test whether you can reason about performance and correctness at the system level. Focus on how instructions, data and memory move through a processor rather than memorising isolated definitions.

Core topics

Pipelines and hazards

Understand pipeline stages and the difference between structural, data and control hazards. Be ready to identify RAW dependencies and explain forwarding, bubbles and stalls.

Latency and throughput

Latency is the time associated with an individual operation or result. Throughput describes how much work can be completed per unit time. Pipelining can increase throughput without necessarily reducing the latency of one operation.

Caches and memory hierarchy

Know cache lines, tags, indexes and offsets, along with hit and miss behaviour. Practise calculating which address bits select a direct-mapped cache index.

Questions worth practising

• What is a RAW hazard and how can forwarding resolve it?
• When must a pipeline stall?
• How do you calculate tag, index and offset bits?
• Why does increasing pipeline depth affect latency and clock frequency?
• What is the difference between latency and throughput?

Practise

Try the pipeline data hazard problem and direct-mapped cache problem on HDLForge.