AXI Ready/Valid Interview Guide
Understand AXI ready/valid handshakes, backpressure, channel independence and AXI-Lite ordering for RTL and verification interviews.
Handshake rule
A transfer occurs only on a cycle where VALID and READY are both asserted. A producer must not wait for READY before asserting VALID when data is available.
Backpressure
READY allows a receiver to throttle traffic. While stalled, transaction information associated with a asserted VALID must remain stable until the handshake occurs.
Questions to practise
What happens if VALID is high and READY is low? Can READY be asserted before VALID? Why are AXI channels independent? What ordering assumptions are safe in AXI-Lite?
Practise on HDLForge
Browse related hardware design problems and follow the structured roadmap.